Greetings,
I'd like to program my Spartan3E with an SPI memory normally. For development at my desk, I understand I can add a header to allow IMPACT to configure the SPI flash memory.
We have many legacy designs that bit-bang the FPGA to program it in slave serial mode allowing (re)configuration by software, typically with no configuration RAM in the first place.
Rather than getting the software folks to write the SPI driver to reprogram the SPI memory through an equivalent bit-bang, I'd be interested in a readback of a slave-serial programmed FPGA by the FPGA while the FPGA is active to directly program the SPI memory with my own internal routines.
--> Any ideas on whether I can accomplish this or how best to approach it?
While writing this post I came to realize the external readback would be on the passive slave port, not the SPI side so the SPI persistence setting isn't an issue. But will I need to double-up the passive serial port to do the readback through other I/O pins?