Field-Programmable Gate Arrays

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Xilinx ML501 availability

Hi with Virtex-4 I did a bad decision, namly I ordered the first board announced as available what was the Avnet-LX25 b...
4 comments posted 20yrs
posted by Antti.Lukats
4 comments posted 20yrs posted by Antti.Lukats

Warningmessage in ISE

Hi there When I synthesis my design I get some warning messages. A strange on is this: It is declared in the Entity: en...
6 comments posted 20yrs
posted by raybakk
6 comments posted 20yrs posted by raybakk

Speed vs Area Optimisation

Hi! I'm a newbie at designing circuits on FPGA and I have found out something I cannot understand very well. I've writt...
4 comments posted 20yrs
posted by mikyt84
4 comments posted 20yrs posted by mikyt84

Anyone use XC3Sprog?

I'm trying to use xc3sprog to program a XCF3s1500fg456 using a parallel cable III. I get the following error: $ ./xc3sp...
2 comments posted 20yrs
posted by ptkwt
2 comments posted 20yrs posted by ptkwt

xc2vp30-6ff1152

I'd like to use Virtex IIP xc2vp30-6ff1152 in Xilinx 8.1i but there is not on the list in Project Properties. Should I h...
3 comments posted 20yrs
posted by spawnek
3 comments posted 20yrs posted by spawnek

Xilinx ise ml402 bram interface

I would like to be able to send and receive data on the fly to a Xilinx V4 BRAM. I would communicate to the A port whil...
0 comments posted 20yrs
posted by bradsmallridge
0 comments posted 20yrs posted by bradsmallridge

memec-avnet reference designs available

Hi it seems that almost all resources from old memec RDC restricted access area are now available for anyone without re...
0 comments posted 20yrs
posted by Antti.Lukats
0 comments posted 20yrs posted by Antti.Lukats

Problem with "don't care"

Hi guys! I'm experiencing same problems with don't care conditions in VHDL (with ISE / ModelSim)... I'm wondering if us...
2 comments posted 20yrs
posted by no.mail
2 comments posted 20yrs posted by no.mail

tcp/ip

hi i am new whit FPGA i just buy the spartan-3e starter kit, i am looking a tcp/ip stack to use whit the kit ( a free on...
5 comments posted 20yrs
posted by aresolimpico
5 comments posted 20yrs posted by aresolimpico

Hello Guys, Please let me know if you need any Cisco

Hello Guys, Please let me know if you need any Cisco WS-X6704-10GE $8390 (CFC) WS-X6724-SFP $7300 ( CFC) PA-MC-8TE1+ $5...
0 comments posted 20yrs
posted by phimhongkongcom
0 comments posted 20yrs posted by phimhongkongcom

Why is Spartan-3 more expensive than Cyclone?

Hi everyone, I compared the prices of two FPGAs from Digikey (http://www.digikey.com): +) Xilinx Spartan-3, XC3S1000 -...
5 comments posted 20yrs
posted by jidan1
5 comments posted 20yrs posted by jidan1

EDK vs. ISE for image processing

Hi all, I'm working on an FPGA implementation of an image processing algorithm. I'll be using the ML401 to do the job w...
12 comments posted 20yrs
posted by alecwei
12 comments posted 20yrs posted by alecwei

Using an FPGA as USB HOST without PHY

Hi everybody, Isi it possible to connect directly FPGA ouptuts to USB line like this : http://osainto.free.fr/USBHOST/u...
21 comments posted 20yrs
posted by nospam
21 comments posted 20yrs posted by nospam

DCM and Maximum Frequency implied by XST

In a design: case 1) using a clock (divided whith a "vhdl process" 25Mhz from 50Mhz) so that the remaining of the desin...
2 comments posted 20yrs
posted by sdroamt
2 comments posted 20yrs posted by sdroamt