Latest threads in Field-Programmable Gate Arrays

A spectre is haunting this newsgroup, the spectre of metastability

To paraphrase Karl Marx: A spectre is haunting this newsgroup, the spectre of metastability. Whenever something works u...

42 20yrs

peter

42 20yrs peter

FPGA-based music synthesizer (with MyHDL)

Hi all: I'd like to draw your attention to an interesting project about an FPGA-based music synthesizer. A remarkable f...

5 20yrs

jan

5 20yrs jan

uBlaze ISR : Steps to write/implement an ISR...

Hi all. At the moment I never implement a ISR on uBlaze system. I have seen, I know I have to use the INTC IP driver ro...

2 20yrs

alfmyk

2 20yrs alfmyk

uBlaze Cache: update Cache Instruction...

Hi all. I have seen this instruction in uBlaze interface header: void microblaze_update_icache (int , int , int ) void...

0 20yrs

alfmyk

0 20yrs alfmyk

Survey: simulator usage

Apologies for the (slightly) commercial nature of this post. Those of you with long memories may recall coding devices...

19 20yrs

eml

19 20yrs eml

connecting SFP-module to Virtex2PRO

I want connect SFP module to the XC2VP7 (use RocketIO in custom mode in 2488 Mbps, ie STM-4). But I anywhere find examp...

0 20yrs

axalay

0 20yrs axalay

EDK 8.2.01i:Spartan3E BSB Problem...

Hi all. Now I'm using EDK 8.2.01i and I want to generate again a project for my software development. For my goal is im...

4 20yrs

alfmyk

4 20yrs alfmyk

Implementing Direct Memory Access for Peripheral (Xilinx Virtex 2 Pro)

Hi everyone, I'm trying to implement a direct memory access for my custom peripheral on a Virtex 2 Pro 30. It seems dif...

1 20yrs

peter.kampmann

1 20yrs peter.kampmann

Have you experience to program the APA series using FlashPro Lite?

I have flashpro-lite programmer of actel. But, in use, very uncomportable because i don't know how to solve the error.....

2 20yrs

kypilop

2 20yrs kypilop

Xilinx Virtex-4 Clock Multiplexer Inputs

Hi all, I'm currently developing a PCB featuring a Xilinx Virtex-4 device. Unlinke the Virtex-II series they now offer...

4 20yrs

maerchenprinz

4 20yrs maerchenprinz

a new spartan3E 1600 starter kit available ?

see http://www.digilentinc.com/Products/Detail.cfm?Prod=S3E1600&Nav1=Products&Nav2=Programmable

4 20yrs

rponsard

4 20yrs rponsard

Chipscope and debugger through the same JTAG port

I am getting from time to time garbage (all signals high) displayed in the Chipscope after successful triggering (which...

4 20yrs

mbmsv

4 20yrs mbmsv

Xilinx Virtex4 Outputs for Camera Link

Can anyone tell me what I need to drive a Camera Link output directly from a V4? I have tried LVCMOS25 and I can see di...

18 20yrs

bradsmallridge

18 20yrs bradsmallridge

OPB to SPI clock frequency ratio

Hi, I have a Microblaze based project that communicates to a 16Bit DAC by means of an SPI interface. I'm using the OPB_...

8 20yrs

acurtin

8 20yrs acurtin

Jumps in FPGA implemented integrator

Hello I am fairly new to this FPGA game, and well am having a few teething problems with my code. I am using an Actel P...

9 20yrs

h.obrien

9 20yrs h.obrien

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