Implementing Direct Memory Access for Peripheral (Xilinx Virtex 2 Pro)

Hi everyone,

I'm trying to implement a direct memory access for my custom peripheral on a Virtex 2 Pro 30. It seems difficult to me to find a starting point for this project, as I cannot find any Papers, Tutorials for that from Xilinx or anybody else. I've looked at the memory controllers which a shipped with the Platform Studio, but they seem to be rather complicated to use and the communication seems to work via one of the Buses OPB or PLB.

At opencores.org I found a DDR SDRAM Controller written in VHDL. The Procotol seems to be easy and I can easily combine this Controller with my own peripheral design.

But how to connect the Controller to the DDR-SDRAM Module on my Board? Do I need to use again one of these buses? If possible, I want to avoid that because these buses are designed for communication with many masters/slaves and that slows down the throughput. But then there's another question. How do I import the peripheral into Platform Studio when not using one of those buses?

Hope you can help me with that and perhaps give me some hints where to start.

Thanks and Regards, Peter

Reply to
Peter Kampmann
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Peter Kampmann schrieb:

choice 1

select MCH_DDR controller connect your peripheral to XCL port of the MCH_ controller its really simple interface, if the OPB doesnt access the memory there will be no arbitration and your peripheral has exclusive access

antti

Reply to
Antti

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