Field-Programmable Gate Arrays

Aurora simplex channel problems

I was wondering if anyone have experience running Aurora v2.4 on CES2 V4FX silicon? I am trying to debug a simplex chan...

0 comments posted 19yrs

posted by mbmsv

0 comments posted 19yrs posted by mbmsv

Caching of external memory

Hi. We are working on a Virtex4 FX12 PowerPC system. The code below is stored in BRAM and so are the stack and heap. Us...

1 comments posted 19yrs

posted by rune_dahl_REMOVE_

1 comments posted 19yrs posted by rune_dahl_REMOVE_

Firmware for Xilinx USB cable

Hi, Does anyone have a copy of the latest USB cable firmware version 1025 (the latest according to http://www.xilinx.co...

6 comments posted 19yrs

posted by rob.dimond

6 comments posted 19yrs posted by rob.dimond

EDK 8.2 Busmaster Example

Hi I'm just doing my first steps trying to get a busmaster example created with xps running. There is some example code...

1 comments posted 19yrs

posted by st

1 comments posted 19yrs posted by st

PowerPC_bus

Does anyone know what is the difference between connecting a peripheral to the PowerPC (Virtex-II Pro) by using an OPB...

1 comments posted 19yrs

posted by

1 comments posted 19yrs posted by

How to save a changed *.wlf file with ModelSim

Hi, Our hardware engineer got *.vcd file from Xilinx ChipScope, then I swithced the *.vcd file to *.wlf file in ModelSi...

3 comments posted 19yrs

posted by wtxwtx

3 comments posted 19yrs posted by wtxwtx

LVDS output pins of Altera Cyclone II

Hi, does anybody know how to switch of the LVDS output pins of a Cyclone II? I use the "alt_lvds" megafunction but ther...

6 comments posted 19yrs

posted by

6 comments posted 19yrs posted by

DCM jitter (again)

Target = XC3S400 Spartan 3 Tool = ISE 8.2i If I understand correctly, the DCM does not use a PLL to multiply-up the inp...

6 comments posted 19yrs

posted by andrew

6 comments posted 19yrs posted by andrew

Xilinx XPS - OPB - EMC software halts. Someting fishy

Hello there.. Hope that someone would help me. I am using the the OPB_EMC ip to read and write from a flash memory. The...

0 comments posted 19yrs

posted by guybye

0 comments posted 19yrs posted by guybye

Anyone use Xilinx ppc405 profiling tools?

> I am also trying to get profiling to work using the PPC405. I have > read the app note, but I am still rather confuse...

0 comments posted 19yrs

posted by alan

0 comments posted 19yrs posted by alan

Thesis

Hi, I am not sure if anyone has done this here. I am looking for anyone who could share their thesis especially on image...

2 comments posted 19yrs

posted by ameliaw.azman

2 comments posted 19yrs posted by ameliaw.azman

Can I see the detail timing parameter by Quartus II tools?

Hi, I am learning FPGA by a DSP book (1st edition) written by Uew Meyer_Baese. There is an example about 16 bit adder w...

12 comments posted 19yrs

posted by rxjwg98

12 comments posted 19yrs posted by rxjwg98

Question: TMED Algorithm

Hello I would like to ask if somebody have any information about TMED (Temporal Modulation Energy Distribution) algorit...

0 comments posted 19yrs

posted by mstrug

0 comments posted 19yrs posted by mstrug

Opencores DDR SDRAM controller

Hello to all, I'm new in this forum; In a Project I need to write and read from a Micron DDR memory (I have a Spartan 3...

15 comments posted 19yrs

posted by menchinidaniele

15 comments posted 19yrs posted by menchinidaniele

wanted: FPGA programmer

looking for someone to program an FPGA to interface with a mitsubishi camera chip... definitely not top dollar, but if y...

3 comments posted 19yrs

posted by aiiadict

3 comments posted 19yrs posted by aiiadict