Field-Programmable Gate Arrays

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Reg:Clock to pad Delay of the System Clock.

Hi experts, Hi all i need a help,I am using the spartan FPGA.I am using the DCM to scale the input clock frequency to 7...
0 comments posted 19yrs
posted by vlnaran
0 comments posted 19yrs posted by vlnaran

asynchronous circuit design

is anybody here who can guide me about asynchronous CAD tools. is any such CAD tool available. which asynchronous design...
7 comments posted 19yrs
posted by sanju4buddy
7 comments posted 19yrs posted by sanju4buddy

XILINX IPCore

Hello, I recently bought a board that has a firewire port that uses PCI32 as a communication to the TI Link layer chip....
3 comments posted 19yrs
posted by yasirmm
3 comments posted 19yrs posted by yasirmm

How to find a false path in the design

Hi Guys We have been knowing the false path and its nature but i am confused as to how to identify a false path in a de...
0 comments posted 19yrs
posted by thevipulsinha
0 comments posted 19yrs posted by thevipulsinha

How to Find false path in a design

Hi Guys We have been knowing the false path and its nature but i am confused as to how to identify a false path in a de...
4 comments posted 19yrs
posted by thevipulsinha
4 comments posted 19yrs posted by thevipulsinha

Weird! sysace_fwrite() cannot be found!!!???

Hi everyone, I run into a weird erorr. sysace_fwrite() cannot be found. -----------------------------------------------...
2 comments posted 19yrs
posted by yao.sics
2 comments posted 19yrs posted by yao.sics

Difference between DCM and PMCD

Hi, I will appreciate if someone clarify for me the difference between DCM and PMCD. When do you need to use both togeth...
0 comments posted 19yrs
posted by ahmedongun
0 comments posted 19yrs posted by ahmedongun

svf file programming issue

I am using spartan3 XC3S400FG456C-4 device. For the past two years or so I have been creating the svf file and I am sud...
0 comments posted 19yrs
posted by cpandya
0 comments posted 19yrs posted by cpandya

Virtex4 CLKX2 DCM Jitter

I guess this is really one for Austin, but I wonder if anyone else has any input. My company supplys a design which is...
31 comments posted 19yrs
posted by mikej
31 comments posted 19yrs posted by mikej

Portable TCP/IP socket library

Anyone has a good pointer to a portable (Windows, *nix) TCP/IP socket library that can be used with VHDL FLI, Verilog PL...
5 comments posted 19yrs
posted by akhailtash
5 comments posted 19yrs posted by akhailtash

Build error for multiprocessor sytem.

Hi, My basic version of design has two interconnected microblaze, FSL has been used for interconnection. There is one a...
4 comments posted 19yrs
posted by shantchandrakar
4 comments posted 19yrs posted by shantchandrakar