Xilinx, VHDL, Verilog, ModelSim, BMP

It depends where your time is most profitably spent - VHDL can handle binary file IO, but the question is if you want to write your own BMP library in VHDL, or if you can obtain one at a cost you find acceptable. There are many variants in BMP, compression types, colour widths, the works...

I'd be more inclined to use some existing (free) tool like the ImageMagick suite to convert your input BMP into a trivial RAW format, either ASCII or binary, and read those into your test benches. You can of course automate the conversion process with scripts, so it doesn't have to be fiddly at all.

Regards,

John

Hi,

Well, let me know if you figure this one out. I had a similar issue -- I wanted a Verilog simulation to write out a TIFF file. I couldn't find a way to write out a binary file, so wrote out ASCII data values to text file and then post-processed it into a binary TIFF file using a small program I wrote in C.

H>

Here's one possibility:

-- Mike Treseler

VHDL certainly can read binary data; Mike Treseler's example is excellent, and starting from it made reading my binary data very easy.

If you can constrain the BMP files you want to read to a specific format (24bits/pixel is probably simplest) go for it, otherwise you may have to interpret many different formats, which is a bit more work...

- Brian

VERY good example !!!

will help me a lot !!

just one remark: shouldn't it be

function spew(i_arg : integer) return char_array is variable result : char_array(0 to i_arg-1); variable index : char_index; begin for i in 0 to i_arg-1 loop index := i mod (char_index'right + 1); --

Looks promising. How do I generate the test file char_file.bin ?

Belay that silly question. Duh. The program generates char_file.bin

Thanks, I'm happy to hear about it.

The attached code is kind of kludge, but it works, with modelsim 5.8e anyway.

HTH, Jim snipped-for-privacy@yahoo.com (remove capital letters)

module wr_bin ();

reg [7:0] data;

integer fd; integer i;

initial begin fd = $fopen("test.bin", "wb");

for (i = 0; i < 256; i = i + 1) begin data = i;

if (data == 0) begin $fwriteb(fd, "%u", data); $fseek(fd, 1, 0); end else $fwriteb(fd, "%c", data); end

$fclose(fd); $display("Done"); $finish; end

endmodule

The attached code is kind of kludge, but it works, with modelsim 5.8e anyway.

HTH, Jim snipped-for-privacy@yahoo.com (remove capital letters)

module wr_bin ();

reg [7:0] data;

integer fd; integer i;

initial begin fd = $fopen("test.bin", "wb");

for (i = 0; i < 256; i = i + 1) begin data = i;

if (data == 0) begin $fwriteb(fd, "%u", data); $fseek(fd, 1, 0); end else $fwriteb(fd, "%c", data); end

$fclose(fd); $display("Done"); $finish; end

endmodule

Dude, you rock!!! Since I'm using Modelsim at home for my hobby projects, this will work fantastic... Now I can write out TIFF files direct from Verilog.

Let me ask another question, if you don't mind. Do you (or anyone reading) know if it's possible to open files with dynamic file names? By that, I mean instead of using the string "test.bin" in $fopen is there a way to form a string with a 2D reg and then pass that as the file name? I tried playing around with this, but the simulator I was using at the time did not like anything but actual strings...

My desire is to have a loop, that writes each display frame to a separate file, with names like:

frame01.tif frame02.tif frame03.tif frame04.tif and so on...

Thanks, I appreciate your help, Eric

Jim Wu wrote:

I know it can be done in VHDL, but not sure about Verilog sorry.

I can dig out the details if you're interested.

John

Try this (tested in mti 5.8e):

module wr_bin ();

reg [7:0] data; reg [10*8:0] fn; reg [7:0] seq;

integer fd; integer i, j;

initial begin

for (j = 0; j < 8; j = j + 1) begin seq = 8'h30 + j; fn = {"frame", seq, ".tif"}; fd = $fopen(fn, "wb"); for (i = 0; i < 256; i = i + 1) begin data = i;

if (data == 0) begin $fwriteb(fd, "%u", data); $fseek(fd, 1, 0); end else $fwriteb(fd, "%c", data); end

$fclose(fd); end

$display("Done"); $finish; end

HTH, Jim snipped-for-privacy@yahoo.com (remove capital letters)

A typo, fn should have been defined as "reg [10*8:1] fn;".

Personally I use PNG format for grayscale images and PPM for colour, as they can both be text only. The files are big, but the ease with which I can fiddle with them in VHDL compensates!

I have a package which allows me to read and write both types of files to/from frame buffers.

Just a thought! Martin

Hi,

Jim posted some stuff that looks like it will solve my problem. I'm going to work on my TIFF writer over the weekend and when I'm done (and if it works...) I will post it here.

Thanks, Eric

John Williams wrote:

Thanks, I am going to try integrating this into my existing TIFF file writer and I'll let you know how it works out for me. I really appreciate the thought you put into it.

Eric

Jim Wu wrote:

You're welcome.

I didn't try this myself, but theoretically it should work: if you need "seq" to be more than 1 digit, you can try swrite* tasks.

Jim

Shouldn't that be $fseek(fd, -3, 1), to seek backwards

Some simulators actually let you write a NUL byte out with %c, which avoids this nastiness.