Hi all, My problem is as follows, I need to use a BRAM to create a true dual port memory (6x512). My memory should be written to/read from simultaneously. But !!! my problem is that I need to fill the memory with bit at a time i.e. whenever I get a bit in my input I also get two signals - address and bit field (0-5) and that bit should be written to that address correct bit location. Now if another bit arrives to the same address but to a different bit field it should be also written to it (like a bit-wise OR between current value and new value).
I thought to implement it with Xilinx's BRAM by Or'ing the RAM output with the new written input but I noticed (too late..) that the BRAM output comes out one cycle after the address. This makes it a problem for me because now I need 2 clock cycles for every one of these "bit-enabled write" operations.
I hope that my post is not too long and exhausting and I would appreciate any ideas from you guys...
Thanks, Mordehay.
p.s - I'm using V4 (lx).