Hi, I'm trying to do implement a buffer in Virtex II pro. My system has
8 bits 100 Mbps as an inputs and 16 bits 2.5Gbps as an outputs. Since size of inputs and outputs are different, I couldn't use asynchronous fifo which virtex provides. Does anyone have any reference I can start with? Dual port BRAM looks fine but data got distorted on simultaneous read and write process, because each process working at a different clock.Any comments will be appreciated.
Jdon.