2 microblazes, 1 opb, 2 BRAMs

Hi,

I don't think you can have a shared memory with cover 0x0000 - 0x3fff and make it so that the processors sees it as 0x0000 - 0x7fff. That would double the amount of memory available.

Göran

The implementation will looks like above.

uBLAZE1 uBLAZE2 | | MMU (switch) MMU (switch) | | |---------------------OPB--------------------------| | | BRAM 1 (16kB) BRAM 2 (16kB)

The assembly programmer should see the memory as 32 KB global memory. The role of MMU will be to translate the address and decides which (one of both) memory should be accessed. It does not matter the address range of each memory. I need some help. Thankyou very much for some hint on how to realize this....

Hi,

This picture shows the connections, thanks. So you want them so see this memory differently. uBlaze1 - BRAM1 0x0000-0x3fff - BRAM2 0x4000-0x7fff

uBlaze2 - BRAM2 0x0000-0x3fff - BRAM1 0x4000-0x7fff

Is this the address map that you want?

Göran

hi

The address map will be (i think) depending on hardware implementation.

What I need to implement is

- BRAMS are shared to each uBLAZE.

physical address will (preliminarily) be BRAM1 : 0x0000 - 0x3fff, BRAM2 : 0x4000 - 0x7fff. yes, logical address will (preliminarily) be

uBlaze1 - BRAM1 0x0000-0x3fff - BRAM2 0x4000-0x7fff

uBlaze2 - BRAM2 0x0000-0x3fff - BRAM1 0x4000-0x7fff

For example, programmer writes 'ld rD, rA, 0x5000', then the MMU directs the path to BRAM2 (using the switch) and perform the load instruction. I am wondering and investigating if this is possible.......hope be possible.

regards

Hi,

You don't need a MMU for this. You should only invert address bit 17 from uBlaze2.

Although is not easy to do directly in .mhs file it's still possible.

Göran