The connector goes to my platform cable USB and I can successfully program the FPGA and each xcf32p in boundary scan mode. My question is how do I get one of the Proms to auto-configure the FPGA? The mode pins on the FPGA are unconnected, which in the documentation means that it's set to slave serial mode. I've tried taking the bit file for the FPGA and generating an MCS file for the PROM, then writing the MCS to the PROM (tried both external clock setting and use internal clock). I expect the PROM to magically find the FX12 in the chain and configure it. Is there another setting that I'm missing?
There could be a multitude of scenarios on why a PROG pulse of power-up will not start the configuration sequence from the prom(s). I will go over some basics in a logical order and you will have to do some debugging based on that and other(s) suggestions.
First, is to not leave the mode pins untied. Pull them up or down according to the configuration mode you are looking for. The weak pullup/downs on these pins are not sufficient to guarantee the proper mode setting especially in a noisy environment.
Make sure that you have generated the MCS files correctly especially if you have multiple proms. You might find that both proms are trying to deliver configuration bits simultaneously creating contention on the FPGA Din pin. If the MCS files are generated correctly, one prom will tristate its Dout pin preventing any contention. Also make sure that the prom that contains the configuration data is driving the clkout pin (assuming you are not using an external osc). I would recommend putting a scope on PROG, INIT, CCLK, Din, CE/CEO pins to make sure they are behaving as expected.
Also refer to the PFP Users Guide to make sure that you have the proper routing on the various configuration pins that connect the proms to the FPGA(s). Verify that the pins requiring pullups have them.
Unfortunately I'm stuck with unconnected mode pins in this prototype of the board.
One of the PROMs has connections to the FPGA with the following pins: FPGA_DOUT_BUSY FPGA_PROG_B FPGA_CCLK FPGA_INIT FPGA_CS_B FPGA_DIN
I'm assuming that the FPGA can either be programmed with the JTAG pins (TDI,TCK,TMS,TDO) which I'm currently using in boundary scan mode, or the pins I listed above. Is the first known as Slave Serial and the latter known as SelectMAP? Am I hosed without the mode pins?
OK, we will work with the mode pins as they are. By default, BitGen will have these pulled low. That puts the FPGA in master serial mode. Here, the FPGA will provide the CCLK so we do not want to configure the xcf32p (MCS file) to use the clkout feature or use an external osc. You should see the default frequency of ~ 4MHz on this pin supplied by the FPGA.
From what I have gathered about your layout is that the JTAG pins connect all applicable devices on the board. That's great and you should be able to see and program via JTAG (as per your initial post). Remember that how ever your mode pins are set, you always have JTAG functionality.
I also gathered that you have one of the proms tied to the V4FX12 (that's a big prom for a small device). You say that you have the DOUT/BUSY and CS pins connected between the prom the FPGA. These are not required as they are only applicable for parallel and/or daisy chain configurations. At this time, I am not sure if they pose a problem. DOUT of the FPGA will only be an output if the LOUT word is seen in the configuration bitstream and is used for sending configuration data to a downstrem device. Additionally, as the mode pins are in a master serial mode, the CS pin should not be configured as a chip select.
Has looking at the scope shots of your configuration pins helped (i.e. compare them then to what you see in the Configuration Users Guide)? Here are some basics to look for:
-Upon powerup or PROG pulse, do you see INIT transition from high to low (and stay low until DONE goes high)?
-Does DONE go high?
-What is the CCLK frequency?
-Do you see the synchronization word on the Din pin?
-Are the PCB traces connected to the correct pins on the FPGA/prom?
-Are the proper pullups in place (i.e. DONE, INIT and PROG)?