i have a problem while configuring the virtex2 pro fpga in slave serial mode i am using platform flash RPOM of XC40FS serial flash prom. i am not getting the done pin high after configuration.
my doubt is whether i have to connect the external ossilator (slave serial mode) in order to supply clk form PROM to CCLK of fpga. i read that if it is in slave select map mode and if the PROM is of parllel prom we need to supply clock though external ossilator what the case with serial prom. i am not getting the cclk when i am debugging with ossilocope.
what is the major difference between master serial and slave serial (its with rescpect to clock that fpga provides clock when it is in master m9de and the prom or external ossilator supplies clock when it is in slave serial mode or any other particular difference is there.)