unbreakable conmbination cycle in Handel C

You need a latch to break a combinatorial cycle.

Consider the verilog statement

assign n=n+1;

Unlike in C, (Fortran, PL/I, Algol, BASIC, Pascal, ...) where the new value replaces the old value only when the statement is executed, this is a continuous assignment statement.

As soon as the new value appears in n it is immediatly used again in the expression n+1. As hardware, it connects the output of a combinatorial adder to its input. It might be that it cycles through the allowed values as fast as the adder allows.

The verilog code

always @(posedge clk) n=n+1;

will assign to n on the rising edge of clock the value n+1 had just before the clock edge (at least Tsu before). As hardware, it is a latch on the output of an adder, with the latch output connected to the adder input.

-- glen