Problems with Output pins on XUP board


I'm trying to connect my VHDL core of a PLB bus master to two LEDs to aid me in debugging the hardware as I'm using it. However, when I add the output signals to the design, I get the following errors:

ERROR: NgdBuild:467 - output pad net 'plb_master_out_0_LED_0_OBUF' has an illegal buffer ERROR: NgdBuild:467 - output pad net 'plb_master_out_0_LED_1_OBUF' has an illegal buffer

I've tried running this signal through an OBUF, but that didn't seem to get me anything. I've tried running it without the OBUF, and I get the same errors.

I created the core using the create/import peripherals for a PLB core with 16 slave registers, interrupt support, and master mode.

Any help would be appreciated.

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I found the problem. The system wasn't recognizing changes I made to the hardware and was using the old compiled vhd file for all of its work. The solution was to perform a clean hardware BEFORE running the initialize BRAM function.

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