Hello,
I need to synthesize a verilog code for a Spartan device and was wondering whether I can use Icarus Verilog for this.
I looked on the Icarus web page and it says that Icarus supports synthesis. I am pretty new to logic design and especially synthesis.
Now I try to figure out how to synthesize my code for the Spartan. There are not really any device specific options given. The compiler can just be called with the -tfpga option.
Is that all there is? Does this create me an edif file that I can import into ISE to do the place and route?
I also tried searching the gEDA list archives for answers, but could not reach the server.
Thanks for the help.
Guenter