Hi, if anyone could help me. I had declare real variable in vhdl and everything seems to be working after running simulation using the Xilinx ISE software. However, when i try synthesizing, it prompt error Real operand is not supported in this context. Please if anyone could help. I require floating variables to be declared in my code. Thanks.
Yeah, real variables are useful for making simulations more readable or for generating data for a testing, but they don't synthesize into real hardware. What are you trying to do?
everything seems to be working after running simulation using the Xilinx ISE software. However, when i try synthesizing, it prompt error Real operand is not supported in this context. Please if anyone could help. I require floating variables to be declared in my code. Thanks.
I suppose you should RTFM. Carefully.
On page 313 of the "XST User Guide" (for version 7.1i) we read, "Note: Functions and procedures in the math_real package, as well as the real type, are for calculations only. They are not supported for synthesis in XST."
One problem is that starting on page 285 of that same guide, we read "XST accepts the following VDHL basic types" and on the next page, under the heading "The following types are VHDL defined types," we see REAL listed. This implies that one can use REALs for synthesis.
David Bishop has developed a synthesizable REAL package.
Well, the intention of my vhdl code is to use floating numbers both positive and negative for multiplication. This is part of my entire neural computation. Seems like real variables are not synthesizable. Intresting to hear that David Bishop has a synthesizable REAL package, do u know where can i get it? Thanks.
and negative for multiplication. This is part of my entire neural computation. Seems like real variables are not synthesizable. Intresting to hear that David Bishop has a synthesizable REAL package, do u know where can i get it? Thanks.
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