I have took a Xilinx design through synplify and then started ise fro synplify to place and route. The problem is I have some coregen component and when I try and place and route it complains about missing edif files. can find these files in the synplify directory but how do I tell ise abou them?



Reply to
Loading thread data ...

In the Xilinx ISE GUI, right-click on Implementation or Translate in the Processes window, the Translate Properties include a "Macro Search Path" where you can browse-to and specify the directory that holds any extra edif or nco files.

Reply to

Reply to

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.