I'm using Synplify 7.2 Pro to synthesize a rather simple design for an AT40K10AL component. My problem is thet Synplify likes to add a few macros that Atmel doens't support directly in their IDS place and route tool. These are, more spefically, the ldrasa and fdrasa cells. I found that for Xilinx parts, Synplify ships with macros that can be used by the Xilinx p/r tool, however I have found no such substitute for Atmel devices.
Is anyone aware of a solution to this problem? Are there macros available to solve the problem? or better yet, is there a way to tell Synplify not to use certain types of cells when synthesizing?
Thank you.
--Greg
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