Symbolic names for pll derived clocks in SDC file? (quartus)

Wojtek,

If you are using "derive_pll_clocks", there is no way to customize the generated clock name, so you only get the two choices.

But you do not need to use "derive_pll_clocks". Instead, you can simply add your own create_generated_clock statements, and use the "- name" argument to name your clock exactly the way you want it. The best way to do this is to first call derive_pll_clocks, and then look for the messages that indicate exactly the generated clocks that were created. Then copy the commands into your golden SDC file and then simply modify the "-name" argument. You can also check the generated clocks from "report_sdc" or you can use "write_sdc" to generate a copy of the SDC with the generated clocks (but be careful to give write_sdc a different file name not to overwrite your golden SDC file).

Obviously, this is a tradeoff between:

1) the convenience of TimeQuest generated PLL clocks for you and ensuring that you always get the right clock every time you change the PLL settings. But having to use the pre-defined clock name 2) the flexibility to name the clock your own way, but forcing you to have the discipline to change the SDC file every time you change the PLL settings

We are considering adding a way to rename the clock, exactly to allow users to get the best of both worlds, but we currently do not have any release date for that.

Hope this helps and that you are enjoying the benefits of TimeQuest.

-David Karchmer TimeQuest team

Wojtek,

I forgot to say that if you are using Quartus II V7.1, TimeQuest will cross check the clocks defined in the SDC with the PLL settings, and will give warnings if it finds any differences. This in case you go with the explicit create_generated_clocks but you forget to edit the SDC after modifying the PLL settings.

-David

Thanks. What I need is to have the phase relationship automatically updated, whenever I change any settings in the PLL.

Anyway my questions was probably stupid. It can be done just with the features of the Tcl:

derive_pll_clocks

set out_clk80 "out_clk_pll_1|altpll_component|pll|clk[0]" set out_clk80_latch "out_clk_pll_1|altpll_component|pll|clk[1]" set out_clk80_data "out_clk_pll_1|altpll_component|pll|clk[2]"

then:

set_output_delay -clock $out_clk80_latch -add_delay 1.0 [get_ports {IFIFO_OUT_DPRSNT}] set_output_delay -clock $out_clk80_latch -add_delay 1.0 [get_ports {IFIFO_OUT_CT[1]}]

-- Thanks & Regards, Wojtek

Hi,

Couple of months ago there was a question about TimeQuest clock naming.

dervie_pll_clocks generates some cryptic names, which are not wanted, and doing manually create_generated_clock is also time-consuming and error-prune.

The solution to this could be:

create_clock -name primary_clock ... derive_pll_clocks create_generated_clock -name myclock -source [get_ports {my_clock_ouput_pin}]

Las line creates a clock, which has clock source by the desing. If my_clock_output_pin is replica of pll_clock, then the generated clock has the same properties, automatically, without any cryptic clock names, with smaller propability of manual error.

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