Hi people...
I am trying to find a vhdl code for 3x3 sobel algorithm to implement on a Spartan 3, FPGA.
I have found many papers on the subject but they are all from a high level of abstraction and none include any actual code.
Any help would be greatly appreciated.
Ross Albi
Ever thought of writing it yourself? As a hint, do the x2 as a lef shift.
HTH!
What's wrong with a high-level of abstraction? Just write code that does what the high-level abstraction says - it's a fairly simply operator!
How's this: entity sobel is port ( top_left_pixel : in integer; top_middle_pixel : in integer; top_right_pixel : in integer; middle_left_pixel : in integer; middle_right_pixel : in integer; bottom_left_pixel : in integer; bottom_middle_pixel : in integer; bottom_right_pixel : in integer; sobelx : out integer; sobely : out integer );
end entity sobel; architecture noddy of sobel is
begin -- architecture noddy
sobelx
The greatest challenge probably isn't the Sobel computer itself but the memory management. If the image/video frame is too large to fit in the FPGA, you'll have to have an external memory controller and line buffers, etc. -Kevin
Rossalbi Check out Peter Ashenden's new book on Digital Design.
Jim
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