Is there a way of generating VHDL code from Matlab code for DSP, more precisely image processing using wavelet transform? I want to implement a small 8X8 image processing layout that will use wavelet transform and it is not easy to come up with the VHDL code for that. Any help would be highly appreciated! Thanks, Dan
If you're targetting Xilinx AccelDSP may be of use.
Otherwise, write a spec, and give it to a human VHDL-code-generator :-)
You don't say how fast you need it to run and on what image sizes - this may affect the feasibility of the conversion.
Cheers, Martin
-- martin.j.thompson@trw.com TRW Conekt - Consultancy in Engineering, Knowledge and Technology http://www.conekt.net/electronics.html
Technology
I am interested in image processing of 128x128 image using wavelet transform compression, 12 bits per pixel, monochrome. Thanks, Dan
Another solution could be to use Catalytic MCS which translate M-code to "Catapult compatible C" followed by Catapult which synthesises the code to VHDL. These are professional tools and as such come with the usual price tag :-)
Hans
At what sort of frame rate?
Cheers, Martin
-- martin.j.thompson@trw.com TRW Conekt - Consultancy in Engineering, Knowledge and Technology http://www.conekt.net/electronics.html
Technology
Frame rate expected is 30fps.
Thanks, Dan
Technology
That doesn't terribly fast for that small size of image, only 0.5M pixels/sec. You can get a lot done in an FPGA in the length of time one pixel takes to comes along (assuming they're evenly spread of the time of course!).
Cheers, Martin
-- martin.j.thompson@trw.com TRW Conekt - Consultancy in Engineering, Knowledge and Technology http://www.conekt.net/electronics.html
128x128x30 fps should be trivial to implement "by-hand" ... That's 0.5 Msamples/s The resources will depend on how much effort you're willing to put ... But even with a "dumb" architecture that should fit in almost the smallest FPGA. There are several paper on how to implement them and even the simplest one (i.e., your pipeline is basically the lifting steps of the wavelet) should fit your purposes.
In a Virtex4 SX35 we do a 5 level 9/7 daubechie 4096x2048 50fps 3 components, that's 1250 Msamples/s That requires slightly more attention ;)
Sylvain
The answer is yes: Synplify DSP from Synplicity. It generates generic RTL code (VHDL, Verilog) from Simulink models and m scripts.
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