Data transfers between MicroBlaze and VHDL

All you need to do is create a custom AXI IP module that will interface between your IP and the Microblaze. There is a wizard that will do this for you.

Jon

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Thank you Jon for your reply, but I am still a little confused. I have not= iced that there are IP modules for BRAM, GPIO, and even FSL...but I am unsu= re as to which one to choose. I have tried adding the FSL IP module into m= y design, but when I do, I don't see how to connect it to anything so that = data can be transferred to and from the MicroBlaze? Are there any helpful = guides that you know of that could possibly walk me through some of these m= ethods?

- Robert

All I know about the Microblaze is that it's a synthesizable microprocessor, so take this with an appropriate-sized grain of salt:

I expect that the most convenient and commonly used way of connecting to the Microblaze core is going to be as a memory-mapped peripheral. So at some point you need to learn how to make ports on your VHDL module appear to the Microblaze as a memory location (or you need to dig around and find out if there's a tutorial or wizard that will help you out).

Whether you want to configure things so that your interface has the Microblaze pounding away at one memory location, or several, or whether you want to augment the interface between the Microblaze and your logic with a bit of block RAM that's configured as dual-port memory, is a decision that you'll have to make.

Ultimately, though, I think the best way you have of making your logic go "zing!" in response to something the processor does is to have logic registers show up in the Microblaze's memory map.

Robert,

Guessing from the limited details you provided, it sounds as if you are goi= ng to be trading a reasonable amount of data between the microblaze and you= r VHDL module.

GPIO is likely not sufficient. BRAM (dual port setup) may be possible, howe= ver you would still need to implement the handshaking between the microblaz= e and your VHDL module. FSL sounds like it may be a possible candidate or a= t least give you an idea of how it can be done.

Check out the FSL core datasheet DS449 and the application note XAPP529. Th= is should give you an idea in a general sense how it's done. From there you= should be able to arrive at what best suites the needs of your application= .

Regards, Carlton

What you need to do is to look at doing the tutorial that Xilinx provide with EDK. Its called concepts tools and techniques. Basically Microblaze can use either a PLB or AXI bus. The AXI bus is the newer standard and so that one would be the best to use. Xilinx provide a wizard that creates an interface bewteen the AXI bus and your IP. So you don't even have to know how AXI works. You just get a set of standard signals which are a write and read data path. But just have a look at some of the Xilinx docs as this should make things clearer.

Jon

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Thank you to everyone for your replies! This gives me some great information to look over and figure this out. Thanks again for your help!

- Robert

Carlton,

I have tried finding the XAPP529 pdf from Xilinx, but it always comes up wi= th a "Bad encrypt dictionary" message. Would you be able to email me the d= ocument if you have it? Also, I noticed in the FSL Core Datasheet (acquire= d through XPS 14.1) that the FSL is not supported by the 7-Series FPGAs, si= nce I am looking to migrate to that from my Spartan6, do you have another s= uggestion/option for me in lieu of the FSL?

- Robert ( snipped-for-privacy@gmail.com)

oing to be trading a reasonable amount of data between the microblaze and y= our VHDL module.

wever you would still need to implement the handshaking between the microbl= aze and your VHDL module. FSL sounds like it may be a possible candidate or= at least give you an idea of how it can be done.

This should give you an idea in a general sense how it's done. From there y= ou should be able to arrive at what best suites the needs of your applicati= on.

with a "Bad encrypt dictionary" message. =A0Would you be able to email me t= he document if you have it? =A0Also, I noticed in the FSL Core Datasheet (a= cquired through XPS 14.1) that the FSL is not supported by the 7-Series FPG= As, since I am looking to migrate to that from my Spartan6, do you have ano= ther suggestion/option for me in lieu of the FSL?

going to be trading a reasonable amount of data between the microblaze and= your VHDL module.

however you would still need to implement the handshaking between the micro= blaze and your VHDL module. FSL sounds like it may be a possible candidate = or at least give you an idea of how it can be done.

. This should give you an idea in a general sense how it's done. From there= you should be able to arrive at what best suites the needs of your applica= tion.

I think that message is usually an indication that your reader is not sufficiently current. Try updating and opening the document again.

Rick

AXI4-stream replaces FSL. The AXI docs are in UG761.

As an aside - you might want to install the DocNav from Xilinx - that keeps all their docs together and updated:

Cheers, Martin

Thank you! Thank you! Thank you! I regard finding / tracking Xilinx documents with the same level of enthusiasm as a trip to the dentist.

This program will make my life easier.

Pete

You're welcome :)

Yes, it can be a bit like that can't it?

Cheers, Martin