Did anyone get the DDR SDRAM work on the Xilinx Spartan 3E Starter board?
I have tried to load the pre-built BIT file specifically for this board: s3e_starter_revD_mig_ddr. The readme file states that the LED1 should be slightly lit while LED0 should be OFF. In my case the LED1 is fine, but the LED0 is constantly ON. I tried to load the ChipScope - enabled version of the bitstream and get the same result. Also the lfsr_data has nothing in common with read_data_reg in ChipScope.
I tried running on 100, 50 and even 32 MHz (should be 80-133). Same effect.
And help highly appreciated.
-Alex.