In "Embedded System Tools Guide" on EDK6.2 say: ".... MicroBlaze requires 2 clock cycles to access on-chip Block RAM connected to the LMB for write and 2 clock cycles for read. On chip memory connected to the OPB bus requires 3 cycles for write and 4 cycles for read...."
I don't understand, request latecies to BRAM = 1 tick. Request latecies to OPB (from timing waveforms) = 1 tick, if "Ack" signal generate with read strobe.