Hi all, i am currently working on altera FPGAs,when i was trying to generate a memory using megafunction wizard,in the options it is registering both inputs and outputs of the memory,and i have the option of not-regestering the output.But as the input is registered when i use the component it is not giving the expected value.Can anyone tell me how to disable the option of not registering he inputs.
waiting for reply,
Thank you,
Regards Ramakrishna
Hi Ramakrishna,
as far as I know it is not possible to disable the input registration.
Rgds Andr=E9
Is the address value already registered? One thing the Synplify synthesizer will do for an asynchronous style memory is provide a registered output for a live address *or* a live data for a registered address.
If you can come up with your next-cycle's address one cycle early, the
*required* address register can "look like" the live address you otherwise wanted.Once you know that the address *must* be registered, designing for that requirement is pretty simple.
If your address is going to be one of 2 values and you can't make the decision of which one immediately, a single-port RAM could be implemented as a dual-port with the two different addresses with the choice of read data coming up after the actual read.
Have something to add? Share your thoughts — no account required.
Ask the community — no account required