Hi to everyone,
I have an Avnet XILINX Virtex-II Pro FPGA xc2vp7ff896 and I am trying to make simple designs work on this board. I'm using EDK 6.3 for designing purposes and Impact to generate the .ace file and copying it to the compact flash card. I have already tried 3 or 4 different designs and none of them seem to work on this board. I think i'm doing everthing correctly since on power up I choose the design to be executed with the dip switches on S1 and reset the board with the first dip switch on S2 like the manual says. Although everything seems to work correctly (no error lights on the board) there is no type of response from the application through serial port of the board on to the hyperterminal session on my PC. Nevertheless when I try booting the .ace files that come preconfigured from factory on the compact flash they all work correctly. ¿Is there something i'm missing making the design? When choosing files to add to the ace file, ¿do I choose only the download.bit file or do I also choose the .elf file? When I choose both I have error lights on the board. ¿Is there any way of debugging the application without the JTAG parallel cable? ¿Do I have to include SysACE component in EDK designs in order to be able to boot from the CF card? If I include SysACE component EDK no longer lets you choose SDRAM component, necessary for nearly all my designs.
Thankyou.