Hi, list, I am using Quartus II 4.2 and 5.0 (on two different machines) web-editions for MAX II design. The chip is done and I know how to simulate the design by forcing the input pins. But now I want to simulate the chip with some simple off-chip logic. For example, I want the output pin 'B' to feed the input pin 'A', then simulate the chip again. How do I do that? I remember I have done that with XILINX software by generating a simulation "shell" vhdl file, then editing the vhdl file to fit in the logic. But how about Altera? Thank you!
vax, 9000