Problem with xilinx 12.3 Timing Analyzer

Hi,

I am using xilinx 12.3 for my synthesis and implementation. I am having issues running timing analyzer, the problem is that when i run timing analyzer from the ISE Design Tools menu as a stand alone application and open my design with .ncd file, a message pops up and says "Design is missin for open design. Please make sure design (.ncd) is opened". I have no idea what it means as i am openeing the design according to the procedure i read on some site.

Secondly, if i run it from within xilinx Project navigator-> Tools-> Timing Analyzer->Post Place and Route, a message comes in console window at the bottom saying

"Process "Analyze Post-Place & Route Static Timing" completed successfully".

But i don't see timing analyzer running or anything.

Can anyone tell me how to make it work.

thanks

regards

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