Problem with Signal Tap II Logic Analyzer in Altera Quartus II 4.1 and Microtronix Stratix development board

Hi.

A colleague and me are having problems getting the SignalTap II Logic Analyzer from Quartus II running on our Stratix device. We compiled a NIOS example-design and programmed it to the device. We know the example is working because we loaded a little C-program to the NIOS which resulted in correct output. We also tried to use Signaltap with a self-created simple design but this also didn't work. We tried to use the SignalTap II Logic Analyzer in two ways:

1) We opened the Signaltap II Logic Analyzer from the Tools menu in Quartus. There we added the nodes we tried to analyze. We enabled SignalTap II Logic Analyzer in the project's settings and chose the created stp-file there. We followed the instructions we got from the program which told us to compile the design and then to program the device. After programming the device, SignalTap still told us to program the device. In the documention it says that "Ready to acquire" should be the next message but we still get "Program the device to continue". When we try to ignore the message and acquire data anyway we get a JTAG communication error. 2) The second way was to create an instance of a SignalTap II Logic Analyzer using the MegaWizard Plug-In Manager and added it to the design. We connected the inputs (clock, data, trigger), then we created a stp-file using the menu item as described in the documentation. This way we encountered the same problems as before.

We don't know what we are doing wrong, can anybody help us getting the SignalTap II Logic Analyzer running?

Thanks.