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Altera Pin not used in Quartus project but drives logic

Hello all,

Environment FPGA : Altera Cyclone FPGA(EP1c20F324I7) Synthesis Tool : Quartus Integrated Synthesis(Quartus Version 4.2 build

178)

We are using Altera cyclone FPGA with a nios processor.On our custom new board,few pins are connected to FPGA,but we did not use those pins in our design,However we are observing some signals on these pins.

We are confused how FPGA drives logic on the pins that we donot use in design.Are we missing something?

Can anybody please give us a hint how to solve this problem?

Thank you very much, Monica DSouza, Germany

Reply to
Monica
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By default, some versions of quartus route signals through unused pins to save internal resources.

One way is to declare and describe exactly what you expect these pins to do: a

Reply to
Mike Treseler

Hi Monica,

in Quartus II software, select Assignments in the menue selection, there you select "Device". Now a settings window pops-up, press the "Device & Pin Options..." button. Another window pops-up. One of its tabs is called "Unused Pins". That is what you are probably looking for.

Alternativ another smart and good way is of course Mike's hint of assigning unused pins directly to a specific signal, e.g. 0.

HTH Henning

Reply to
henn2005

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