Hi folks,
I'm facing one problem that is driving me crazy...
The error is the following:
Error: JTAG ID code specified in JEDEC STAPL Format File does not match any valid JTAG ID codes for device.
I'm using one ALtera University Program with ByteBlaster MV Cable on a Windows XP machine.
This is my first project in FPGA... I read almost everithing about ByteBlaster and Quartus II configuration, and nope...
My cable is installed, and everytinh else...
Thank you very much in advance.
JL Martins