Large power planes vs. power islands vs. slits for decoupling

I know the decoupling topic is a recurrent one but when I looked at the following page, mentioned in another thread, I noticed that they have put slits in the power plane around the FPGA:

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Is this a common practice? AFAIK larger planes have a higher capacitance, but lower frequency resonances, than smaller power islands so does this kind of slits around the FPGA avoid the lower frequency resonances while keeping the plane capacitance?

Anybody has some feedback/papers/urls on this subject (large planes vs. islands vs. slits)?

And BTW what do you think of these capacitors?

Thanks,

Marc

Reply to
Marc Battyani
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The NEC-Tokin pages you point to seems to have been written by someone who was instructed to fill pages while conveying the minimum amount of information.

As far as I can tell, these devices (4-terminal networks) are not simple capacitors in the usual sense. I would be truly grateful if a c.a.f. guru could post a few lines on how they work.

On the plane-splitting point, you can read app notes advocating this practice and app notes claiming that plane splitting is a discredited practice from an earlier era. I get the sense that the current (sic) best practice is that ground plane splitting is rarely a good idea and a degree of VCC plane splitting may help on a noisy board, but much better would be to find out why VCC is noisy and fix it. Again, gurus will set me straight... Also, see Symon's recent posts on puddles.

Tim

Reply to
Tim

Marc,

Other than their odd name, they are extremely low impedance t-lines.

As such, they are basically falt at 1200 uF from DC to daylinght.

So, if you put a power supply at one end, and isolate the ground (in other words, that is what the slit is for) you transfer power to the other end (hot and ground) with a .001 ohm t-line (looks like that very low impedance at frequencies up to a few hundred MHz).

So, now you see a AC short, looking either way: from the power asupply to the load, or from the load to the power supply.

The Playstation 3 uses 8 of them, they isolate each huge ASIC from the other huge ASICs, and there are3 NO OTHER CAPS on the pcb....

Yes, that is right.

Whereas the Wii has > 300 little caps, PS3 has these 8 "magic" t-line structures.

Do they work? Well, millions of PS3 aren't chunking away happily for no reason at all.

We are looking at these seriously to reduce the bypassing requirements down to the PS3 limit: a few of these, and NOTHING else (no other bypass caps whatsoever).

So, it seems the NEC-TOKIN part is the first really new invention in bypassing in many many long years of people who just like to ignore that power distribution is a real issue, and one that needs some creativity.

My hat is off to the engineers who created this wonder.

Austin

Reply to
Austin

How do you handle the multiple voltages? Are they expensive?

Reply to
Tim

Slits in the plane would make sense only if you were trying to keep FPGA noise out of adjacent areas of the plane. So, it will not help the FPGA, but it may help something else, which could be far less tolerant of millivolts of noise, than the FPGA.

-jg

Reply to
Jim Granville

To make best use of these, you may need to redo the power supply fanout on the FPGAs.

Or, include them IN the package :)

I could, for example, see merit in allowing a BALL-Free area on the BGA, designed to allow one of these to mount under the FPGA, on the opposite side.

These are a SMD variant of T filter/feed thru networks, and a variant on

3 terminal SMD capacitors.

In all those, the power is passed THRU the decoupling element (so they have a mOhm spec as well ), and it means there is no series L that kills most trace+via+cap decouplers.

Such feed-thru decouplers, are also very good at keeping noise where it belongs : their plots show very good localisation of the noise, but also seem to show higher levels at 'die-central', than when using the more distributed decoupling. See my comment above, about using one of these underneath the BGA, on the rear of the PCB.

I also see their (impressive) impedance plots, are the devices themselves, and there is no mention of VIA patterns, or trace fanout limits.

-jg

Reply to
Jim Granville

Tim,

Use more than one, one for each supply rail.

As for cost, it cn't be that bad: if PS3 needs 8 to replace 300 0402

0.1uF caps?

Austin

Reply to
Austin

Jim,

I think what is "new" is that these are true four terminal (two port)devices.

You think of them with S11, S22, and S21, S12 parameters.

The isolation goes both ways, and from either port, it looks like a dead AC short (which is better than a capacitor, which only looks like a dead short at one frequency where it is resonant).

They are actually built like a long t-line, with huge C per unit length, and a very tiny L per unit length, which leads to their extraordinary behavior. The careful ratio of LC causes it to act, and appeaqr to be flat over the wide range of frequencies in terms of it Zo.

Austin

Reply to
Austin

Ausin

Does this mean that xilinx are actively charactersing these devices for your FPGAs and that we can get hold of the results sometime soon?

Colin

Reply to
colin

Some in-line stuff about Proadlizer, my other comments at the end.

Unfortunately, once you mount them, they no longer work to infinity (or beyond). As ever, the design is limited by the physical layout of the parts and connections, not the devices.

I think this paragraph is wrong, Austin, there are no slits in the ground plane in the designs shown at:-

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The slots are only in the power planes. Ground isn't isolated, that would be very bad indeed. You've got to get signals in and out as well as power.

But hold on a minute, I see on this site they show the thing used with a slot in the ground plane.

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Ouch! What happens to all the signals going to and from the device? I see here:-
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they still mention the ground plane slot, claiming the ground plane slot offers "more optimal performance" [sic]. My bullshit sense is tingling! I'd suggest this is not true for a real system with signals traversing this ground plane slot. It makes me wonder if they really know for what this device should be used.

OK, what these devices appear to be good at is isolating the power supply noise from the ASICs/FPGA and stopping it spreading over the board. They also provide bypassing for the ASICs/FPGA. It's kinda like a series ferrite and a parallel capacitance at the ASIC/FPGA end. The 'new' bit is that it's all integrated onto a nice low ESL package. The blurb on the site shows how they localise EMC problems, reducing emissions, more than what great bypass capacitors they make.

I see these parts got a brief mention on SI-list back in Jan '04, so I'd suggest they're not a 'miracle breakthrough' or we'd have heard more about them already. I would tend to go for the X2Y stuff we discussed last week on CAF.

formatting link
Or, perhaps slightly more seriously, :-
formatting link

Anyway, whatever else, it's nice to see people doing designs with tiny local power planes for the FPGA, and not believing all the claptrap about plane capacitance and resonances to help PDS for big BGA packages.

Cheers, Syms.

Reply to
Symon

Some in-line stuff about Proadlizer, my other comments at the end.

Unfortunately, once you mount them, they no longer work to infinity (or beyond). As ever, the design is limited by the physical layout of the parts and connections, not the devices.

I think this paragraph is wrong, Austin, there are no slits in the ground plane in the designs shown at:-

formatting link
The slots are only in the power planes. Ground isn't isolated, that would be very bad indeed. You've got to get signals in and out as well as power.

But hold on a minute, I see on this site they show the thing used with a slot in the ground plane.

formatting link
Ouch! What happens to all the signals going to and from the device? I see here:-
formatting link
they still mention the ground plane slot, claiming the ground plane slot offers "more optimal performance" [sic]. My bullshit sense is tingling! I'd suggest this is not true for a real system with signals traversing this ground plane slot. It makes me wonder if they really know for what this device should be used.

OK, what these devices appear to be good at is isolating the power supply noise from the ASICs/FPGA and stopping it spreading over the board. They also provide bypassing for the ASICs/FPGA. It's kinda like a series ferrite and a parallel capacitance at the ASIC/FPGA end. The 'new' bit is that it's all integrated onto a nice low ESL package. The blurb on the site shows how they localise EMC problems, reducing emissions, more than what great bypass capacitors they make.

I see these parts got a brief mention on SI-list back in Jan '04, so I'd suggest they're not a 'miracle breakthrough' or we'd have heard more about them already. I would tend to go for the X2Y stuff we discussed last week on CAF.

formatting link
Or, perhaps slightly more seriously, :-
formatting link

Anyway, whatever else, it's nice to see people doing designs with tiny local power planes for the FPGA, and not believing all the claptrap about plane capacitance and resonances to help PDS for big BGA packages.

Cheers, Syms.

Reply to
Symon

Some in-line stuff about Proadlizer, my other comments at the end.

Unfortunately, once you mount them, they no longer work to infinity (or beyond). As ever, the design is limited by the physical layout of the parts and connections, not the devices.

I think this paragraph is wrong, Austin, there are no slits in the ground plane in the designs shown at:-

formatting link
The slots are only in the power planes. Ground isn't isolated, that would be very bad indeed. You've got to get signals in and out as well as power.

But hold on a minute, I see on this site they show the thing used with a slot in the ground plane.

formatting link
Ouch! What happens to all the signals going to and from the device? I see here:-
formatting link
they still mention the ground plane slot, claiming the ground plane slot offers "more optimal performance" [sic]. My bullshit sense is tingling! I'd suggest this is not true for a real system with signals traversing this ground plane slot. It makes me wonder if they really know for what this device should be used.

OK, what these devices appear to be good at is isolating the power supply noise from the ASICs/FPGA and stopping it spreading over the board. They also provide bypassing for the ASICs/FPGA. It's kinda like a series ferrite and a parallel capacitance at the ASIC/FPGA end. The 'new' bit is that it's all integrated onto a nice low ESL package. The blurb on the site shows how they localise EMC problems, reducing emissions, more than what great bypass capacitors they make.

I see these parts got a brief mention on SI-list back in Jan '04, so I'd suggest they're not a 'miracle breakthrough' or we'd have heard more about them already. I would tend to go for the X2Y stuff we discussed last week on CAF.

formatting link
Or, perhaps slightly more seriously, :-
formatting link

Anyway, whatever else, it's nice to see people doing designs with tiny local power planes for the FPGA, and not believing all the claptrap about plane capacitance and resonances to help PDS for big BGA packages.

Cheers, Syms.

Reply to
Symon

Some in-line stuff about Proadlizer, my other comments at the end.

Unfortunately, once you mount them, they no longer work to infinity (or beyond). As ever, the design is limited by the physical layout of the parts and connections, not the devices.

I think this paragraph is wrong, Austin, there are no slits in the ground plane in the designs shown at:-

formatting link
The slots are only in the power planes. Ground isn't isolated, that would be very bad indeed. You've got to get signals in and out as well as power.

But hold on a minute, I see on this site they show the thing used with a slot in the ground plane.

formatting link
Ouch! What happens to all the signals going to and from the device? I see here:-
formatting link
they still mention the ground plane slot, claiming the ground plane slot offers "more optimal performance" [sic]. My bullshit sense is tingling! I'd suggest this is not true for a real system with signals traversing this ground plane slot. It makes me wonder if they really know for what this device should be used.

OK, what these devices appear to be good at is isolating the power supply noise from the ASICs/FPGA and stopping it spreading over the board. They also provide bypassing for the ASICs/FPGA. It's kinda like a series ferrite and a parallel capacitance at the ASIC/FPGA end. The 'new' bit is that it's all integrated onto a nice low ESL package. The blurb on the site shows how they localise EMC problems, reducing emissions, more than what great bypass capacitors they make.

I see these parts got a brief mention on SI-list back in Jan '04, so I'd suggest they're not a 'miracle breakthrough' or we'd have heard more about them already. I would tend to go for the X2Y stuff we discussed last week on CAF.

formatting link
Or, perhaps slightly more seriously, :-
formatting link

Anyway, whatever else, it's nice to see people doing designs with tiny local power planes for the FPGA, and not believing all the claptrap about plane capacitance and resonances to help PDS for big BGA packages.

Cheers, Syms.

Reply to
Symon

Some in-line stuff about Proadlizer, my other comments at the end.

Unfortunately, once you mount them, they no longer work to infinity (or beyond). As ever, the design is limited by the physical layout of the parts and connections, not the devices.

I think this paragraph is wrong, Austin, there are no slits in the ground plane in the designs shown at:-

formatting link
The slots are only in the power planes. Ground isn't isolated, that would be very bad indeed. You've got to get signals in and out as well as power.

But hold on a minute, I see on this site they show the thing used with a slot in the ground plane.

formatting link
Ouch! What happens to all the signals going to and from the device? I see here:-
formatting link
they still mention the ground plane slot, claiming the ground plane slot offers "more optimal performance" [sic]. My bullshit sense is tingling! I'd suggest this is not true for a real system with signals traversing this ground plane slot. It makes me wonder if they really know for what this device should be used.

OK, what these devices appear to be good at is isolating the power supply noise from the ASICs/FPGA and stopping it spreading over the board. They also provide bypassing for the ASICs/FPGA. It's kinda like a series ferrite and a parallel capacitance at the ASIC/FPGA end. The 'new' bit is that it's all integrated onto a nice low ESL package. Sadly, the end user then has to attach this to his circuit which will affect this impedance. The blurb on the site shows how they localise EMC problems, reducing emissions, more than what great bypass capacitors they make.

I see these parts got a brief mention on SI-list back in Jan '04, so I'd suggest they're not a 'miracle breakthrough' or we'd have heard more about them already. I would tend to go for the X2Y stuff we discussed last week on CAF.

formatting link
Or, perhaps slightly more seriously, :-
formatting link

Anyway, whatever else, it's nice to see people doing designs with tiny local power planes for the FPGA, and not believing all the claptrap about plane capacitance and resonances to help PDS for big BGA packages.

Cheers, Syms.

Reply to
Symon

Hi Tim, Separate ground planes are very rarely a good idea. AFA I can tell, they seem to have arisen because mixed signal parts, like ADCs, have separate analog and digital ground pins. The reason for this is because the package they are in has some impedance in the connection from the die to the circuit board. You don't want noisy digital ground currents travelling down the same connections as the analog ground current as you'll get noise injected into your analog circuitry. However, once the ground signals get out of the device and into your negligible-impedance ground plane, there's no problem. All the ground pins can be joined together. Here's a link:-

formatting link

Here's a link about signals traversing slots in ground planes (there's tons of this stuff on t'internet) :-

formatting link
The same thing applies when signals travel from one reference (say 'analog ground') to another (say 'digital ground').

VCC is different because it's not generally used as a reference and modern devices have many different supplies. It's impractical to have a plane for every single one. You can achieve good performance by having small local planes adequately bypassed. The small local planes pool the capacitors together to achieve the characteristics required. It's also fairly easy to isolate ICs' supplies from each other this way.

Whenever thinking about this stuff, it's important to remember that the vias, connections to the package, and package impedance must ALL be taken into account. It's no help that a Proadlizer has 1pH of inductance if the vias have 2 orders of magnitude more impedance.

HTH, Syms.

p.s. Apologies for my multi-posts in this thread. My usenet provider told me it wasn't posting when I guess it really was.

Reply to
Symon

"Austin" wrote

OK for the power supply but a ground island looks like a rather bad thing for the signal lines. So unless I missed something, I will keep my precious ground planes with no slits or islands. ;-)

[...]

Yes, this is really cool. I'm trying to get some but they seem rather hard to find.

The only drawbacks I see with them is their size and the huge number of vias you need to put to link to the planes with a low inductance that can block the signals routing.

Marc

Reply to
Marc Battyani

"Symon" wrote

Very interesting.

In fact this was my original question: power islands vs. large power planes. When I look at the diffrent app notes, there seem to be a consensus on the use of large planes rather than islands. (excepted this new proadlizer thing). So is there some apps notes/ paper comparing these different ways to do a PDS.

If you look at boards using them, it seems that they are used with a great number of vias to keep the inductance low (cf photo 2):

formatting link

This can potentially block a large number of routes though.

Marc

Reply to
Marc Battyani

Hi Marc, Yeah, there does seem to be a lot of folks designing with large planes. They do work well, but I think they're an expensive solution to the problem. (An FPGA has Vccint 1.2V, maybe 2 Vccos, 3.3V and 2.5V, a Vccaux, and maybe MGT power supplies. Where do you draw the line?) Now that FPGA circuits are moving into the sub-ns rise time region, I think designers would do well to look at the solutions used by microwave engineers over the past decades, rather than try and take the traditional digital designs into this frequency region. IME, microwave designers eschew power planes in favour of more ground planes! Of course, on the other hand, they don't have to worry about 1000 ball BGA packages.

Right, and no matter how many vias you use, you've still got to get the current to the BGA through vias and balls. I think that the X2Y caps on the backside of the FPGA are still a good solution. Cheers, Syms.

Reply to
Symon

...and so will I! I agree with this 100%. Syms.

Reply to
Symon

colin,

Yes.

Austin

Reply to
Austin Lesea

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