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ISE DDR Memory Controller to write between RAM and FPGA

I need help on how to use the EDK DDR memory controller in ISE to write to/from ram and fpga directly. I have implemented the FFT provided by Xilinx Coregen but need a faster memory controller to streamline the FFT process rather than the EDK-PowerPC DDR controller in C that is provided. Any help is appreciated.

Thanks

Ashwin

Reply to
akcooper8
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what chip are you using, consider using MIG tool from xilinx to generate DDR controller which can communication with fpga directly.

snipped-for-privacy@gmail.com wrote:

Reply to
jetq88

if you don't like PowerPC DDR controller generated by EDK, you have to use MIG tool to generate DDR controller which can interface with the rest of fpga.

snipped-for-privacy@gmail.com wrote:

Reply to
jetq88

Al:

I am also us> I ran into this same dilema using a xilinx xup board. If you have a

Reply to
akcooper8

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