During my work with the XUP development board another problem occured when I tried to use the on-board DDR-SDRAM. A data stream is written into the RAM using the PLB bus and burst mode (16 x 64 bit). When I read the data from the RAM using the Power PC after some time an error occurs. It looks like one 64 bit word has not been written into the RAM (or it has been overwritten - I am not sure about this). When I use the Block RAM of the Virtex-II Pro instead everything is fine. I do not change anything but the address. Same protocol is used for both RAMs.
My problem is that I do not have a simulation model for the DDR RAM. It is a Kingston KVR266X64C25/256. All I can do during simulation is to look what the PLB DDR controller is writing to the output pins. And the simulation does not show any wrong behavior at this point. I can not perform any read accesses since there is no RAM model atttached. So currently for tests the only way is to use the real board but here I can not see, what is happening. Does anybody know, where I can get a simulation model for this RAM? I have searched the Kingston page. I have sent them an E-Mail (still waiting for response). I have tried Google but I could not find anything. Same here. Thanks in advance