IIR filter example ?

incredible, I can't find one on google...

process(clk) begin wait until rising_edge(clk); output

is incredible, I can't find one on google...

You should learn how to use Google:

Is this synthesizable?

I did a similar search a couple of weeks ago, but I ended up rolling my own. This will get you started:

If you add a few declarations it is.

-- Mike Treseler

Mike,

What's the advantage of the coding style you demonstrated in this example with procedures instead of direct assignments in the process?

Thanks, /Mikhail

Since the template is always the same, I can write synth code quickly and it often works the first time.

The template separates the tasks of initialization, update, and output wiring. The procedure "update_regs" becomes a distilled functional description without any wires or boilerplate spoiling the view.

I can simulate simple variable updates in my head because the description uses present values only. There are no signals.

-- Mike Treseler

Not exactly legal vhdl, but close. I don't think you can have a sensitivity list and a wait statement in the same process. Remove the sensitivity list and you're good to go, with the correct declarations.

Andy

Frank Buss wrote:

is incredible, I can't find one on google...