Hello!
My question is what are the benefits of using IIR filters instead of CIC and FIR filter in digital down converter implemented in FPGA. My collogue has got this idea, and I am not 100% convinced in its theory. I have made some research on the net and I didn't find any piece of information regarding IIR filters used in DDC, has any of you any kind of experience dealing with IIR in FPGA?
Thanks, Sasa
some info about the design:
Device: V2P Fclk = Fs = 108MHz Finput = 27Mhz Decimation = 128