FPGA quiz: what can be wrong

NO. both LEDs are OK

NO NO NO

all FPGA tools did exact and correct and proper job. no fuzz.

in the matter of fact IF the LED behaviour would have been any different then that would have been an ERROR.

so the described behaviour of the signals named LED1 and LED2 was CORRECT behavior.

question is why?

and yes it is solveable, and yes there is explanation.

Antti

NO you do not - this is wrong suggestion. the VHDL code was checked many times by different people. there really isnt anything wrong with the VHDL, the led_blink signal has no route into the LED1 path

FPGA_pin - RESISTOR - LED - GND

but as said the LED connection really had nothing todo with the issue

this is GOOD answer, wau. well its wrong but was good guess. really. if something is wrong then you should question ANY thing that can cause it.

Antti

Is LED1 blue?

-- Mike Treseler

ROTFL, another good answer! well no it isnt.

MM wrote: (snip on FPGA and LEDs)

With TTL it is usual to wire LEDs from Vcc to resistor to LED to output pin, as the outputs sink better than they source. I would expect that to be true for FPGAs, and even more with a 3.3V power source. The forward voltage of most LEDs is 1.6V or more (more for larger band gap).

OP says when some_signal is 0 only LED2 blinks, so it seems that it is using the FPGA as a current source. No comment on current limiting resistor, though.

-- glen

Why don't you show a more meanngful code snippet?

---Matthew Hicks

Antti schrieb:

Hi Antti, what is considered as a bad PCB? And what as a bad power supply?

My guess would be that you have voltage drops on some of the GND or VCC lines. Maybe the circuit draws high currents synchronous to the blinking LED, causing the LED1 to blink too. This can even happen when you are using ground/vcc planes with an unlucky placement.

regards Eilert

Nevermind, I read in another section of the thread that it wasn't a code problem.

---Matthew Hicks

nothing on PCB and nothing related with power supply has anything todo with the issue

Antti

Could it have anything to do with your FPGA I/O simultaneous switching power merit for that particular I/O bank?

So, a scope applied per my first item shows what ? 'Correct' is what ?

To me, correct is LED1 = ON; LED2 = blink_one_second;

ie one signal, from your first description is supposed to be fully independant of oneSecond, and dependant ONLY on SomeSignal. From the results description there is some "errant coupling", and LED1 is clearly dependant on One-Second, or at least a One-Second clock.

Conclusion: Insufficent information.

-jg

I will try again ;)

Could the signal "blink_one_second" when held low, deconfigure the FPGA and delay it's reconfiguration only once this signal goes back to a high level ?

NO the FPGA is configured all the time

No

there isnt any to show, really

the signal driving LED2 comes from FPGA primitive and goes to LED2 IOB. the signal is not going anywhere else. So there is no code, just 1 point to point connection. it was in VHDL, but I could also do it in schematic, it would be 1 single stright wire and nothing else.

Hi Jim,

yes the signals are FULLY independant. there is no ERRANT coupling, I myself also looked for the this coupling but it really isnt there.

as I made already REAL PRIZE (fpga miniconsole) for the first answer (or question close enough) so I will not reveal the answer or any other information as reply to direct question.

there is a explanation. and I am really glad I did solve the issue without going nuts.

Antti