FPGA input

You could write a small program that generates VHDL package from your coefficients file, using any language that you are familiar with.

The less unfamiliar tools you use, the more robust your project becomes. I used the CoreGenerator once to generate boot roms for a CPU design and it sucked mightily. I don't remember the details (luckily), but the thing was difficult to control from a Makefile, I think, it had strange conventions where it wanted its input and output files to be, it needed to start up Java although I didn't need any GUI, etc.

Now I just write small programs (often in C) that outputs a VHDL package with the needed constants. Simple, easy, works every time.