fifo occupancy bigger than fifo size?

Question

Note: using EDk 8.2.02 with peripheral generated with the wizard with FIFO enabled and one user interrupt that is set to the fifo_almostfull line.

I'm set up to generate interrupts on the fifo almost full signal but I get a couple interrupts and then it stops. If I go read the occupancy register I get a number(0x737) greater than the size of the fifo (0x400). If I then go and manually read from the fifo data register(from gdb) I can get the occupancy to go back to 0x400 and the next interrupt occurs when I run but they stop shortly after.

So, How could the occupancy be greater than the size of the fifo? Have you seen anything like this before?

Thanks, Clark

cpope · Accepted Answer

FYI, I found that by gating the fifo write request with the fifo full signalI could prevent this problem. Apparently the fifo does not like to bewritten to once it is already full.-Clarkago

Peter Alfke · Answer

That's the way controllers are designed. When a FULL signal isgenerated, it is up to the data source to stop writing (and whenEMPTY,it's up to the destination to stop reading.) That's what thesestatus or handshake signals are for.One could design these controllers to be idiot-proof, but that usuallysacrificesperformance or versatility. In a FIFO controller, you wantto be "lean andmean", to maintain max performance.Nothing stops you as user to add "child-proof" circuitry, as long asthe loss of performance is acceptable.Peter Alfke, Xilinx

cpope · Answer

In my defense, this is the only module (in my design) that isn't idiot proof thus my surprise at having to gate the write myself. One could argue that if xilinx is the one telling me (the user) the fifo is full shouldn't they already know not to allow any more writes? But I get your point.

-Clark

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John_H · Answer

You have a loss-of-data condition which should NEVER be handled politely and automatically by the FIFO. You should either have the system designed to never be in that situation or use the (almost) full flag to make things happen so you don't overfill; usually this means shutting off the flow of data, not simply ignoring it.

cp> In my defense, this is the only module (in my design) that isn't idiot proof

fifo occupancy bigger than fifo size?

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