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DLL in spartan2e

Hi,everyone,I now use the spartan2e400,and I want to use the dll in fpga,I need 4 clock in fpga,so I have to divide the clock by using the dlls,I used 3 dlls for my design,and all inputs are the same drived by clock input ,but when place and route ,the system bring errors like "can't place the clock pad or can't place the bupg buffers",and the input clock I constaint it on the global clock,so I have no idea.I do another thing ,I use only two dlls ,and the design can pass place and route.

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bjzhangwn
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It's a known "feature" that the placer gives up when it can't use the simplest possible connections for DLL's and associated global clock buffers. In the Spartan 2e series, DLL's are placed at the top and bottom edges of the chip. Any global clock input can route to any DLL, but only the DLLs on the same side of the chip will meet the tightest available timing. So when you drive two DLL's with one global clock input pin, the placer can choose the two on the same side of the chip as the global input. When you go to three DLL's the placer gives up, since it can't know which of your three DLL's can live with the cross-chip routing delay. You can still do this, but you'll need to add LOC constraints for your DLL's and possibly BUFG's as well. You may be able to fix this using the floorplanner.

HTH, Gabor

Reply to
Gabor

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