I am new to this group and new to FPGA. I am working with XCV2000E fpga. Tool i am using for synthesiz is Xilinx ISE 6.2i. I am working with logic module provided by ARM. I need to interface a push button switch provided in the board. But whenever i use the edge of this signal for triggering in the code(i am using verilog) xilinx tool assumes it as a clock signal and ties it to default pins provided in the FPGA. But this pin is difffernt from the push button input. How can i reassign the input to the push button switch. How can i disable the clock bufferenig in the tool. One method i found is change in the code. insted of directly clocking with push button i passed it through an and gate. This removed buffring of the push button. Eg: insted of always @(posedge pbut) i used assign temp_clk = pbut & pbut_enable; always @(posedge temp_clk)
where pbut_enable is an external signal and assigned LVTTL type to it (this i hope when unconnected will keep the pbut_enable at "high" state"). Will this method work. Anyway i want to know about clock disabling in the tool Hope you people will help me. Thank you.