Hello all,
I am in the process of creating a floating point FCM that interfaces with the APU controller on a ML403 development board. After studying the documentation, I have a few questions:
- In the PowerPC405 Processor block reference (UG018), on page 207, a generic FCM Load Instruction example is presented. Is this an example of a floating point register load instruction? i.e. if the instruction "lfd 1,rX(0)" (Load floating point double) is issued, will the APU follow this example and automatically fetch the data indexed at rX and then send the instruction plus data to the FPU and let it decode that the data should go in floating point register 1? Or is this load example for a special type of UDI?
- How do you enable hardware floating point support in the EDK software compiler?
- On page 188 of the PPC Block Reference, it is stated that three groups of FP instructions can be selectively disabled: complex arith, conversion, and estimates. How do you inform the compiler, either the EDK or a ppc gnu cross compiler that these instructions are not available? If that isn't possible, what happens if they try to execute that instruction? Does the APU or FCM simply issue an exception and hope that the software handles it?
Any advice or suggestions would be greatly appreciated. Thank you.
Sincerely, Jarrod Wood