Die size, pitch size?

^^^^ Substitute oins with balls

^^^

Substitute die with package.

The die should be substantial smaller or else the IC would be much more expensive

Let me ask other question.

FPGA device consists of Huge SRAM cells (around 10 Mbits, xc2vp30-ff896) + memory controller + hard cores (such as PPC, multiplier)

If we neglect hard cores,

I guess that more than 95% of FPGA device is just array of SRAM cells.

Does someone aware of these data? Thank you again.

Your number is exaggerated, but what is your point? What do you try to prove, argue, challenge, understand ??? FPGA technology is no big secret. It is well-understood in the technical, commercial and academic communities. Peter Alfke

I just need to know some technology data, for example, "die size" and "LUT size", in order to compare different designs. As far as I know, these technology data are not available anywhere.

What sort of engineer are you? For God's sake man, get a hammer, smash some FPGAs open, and examine the wreckage with a microscope. HTH., Syms. p.s. Do FPGAs blend?

;-)

There are many sorts of engineers in the world. There is no problem in my posting. Be ignorant instead of posting these offensive jokes.

Symon was not offensive, and he was not joking. If you don't like the hammer approach, then go to your dentist and have him take an Xray picture of a plastic-packaged FPGA. He has the perfect equipment for that. Serious! You keep asking these weird questions without ever telling us about their relevance. Peter Alfke

Dear Peter Please understand that people sometimes find it offensive though they did not mean it. I mentioned that "need to know some technology data, for example, die size and LUT size, in order to compare different designs". Someone who is doing research on different technologies, these data are interesting and relavant, though it is weird for you.

If you had started with something like: "I am doing university research on the relative area efficiency of SRAM-based vs antifuse-based FPGAs..." We would have respected you and tried to help. But just a series of (very) naive questions does not create that same urge to help... Peter Alfke Peter Alfke

It is interesting and relevent to sincerely too few individuals to make this data practical to disseminate by any FPGA manufacturer.

To ask "what is the tolerance on the exhaust pipe diameter at bends" might be interesting and relavant to some engineers considerations on exhaust back pressure, but it's really not of interest to virtually any and all automotive engineers, including those designing exhaust systems!

You may be asking the wrong question and we're completely unaware of what you are really trying to understand. You ask questions which do not appear to be the least bit relevant to working with FPGAs or even designing them. In your own view, this information may be relevant but we cannot for the world understand why!

Your research may be based on assumptions that could be valid when comparing NAND gates to NAND gates but not relevant in the FPGA world. Or maybe it is, but we cannot see it so there's no reason for us to help you pursue senseless pursuits. Unless maybe you can get me those exhaust bend diameter tolerance values.

- John_H

Well, he was half-joking :) I mean, sheesh a Hammer, what was Syms thinking! ?!

- a better workshop tool is a Vice and a file/grinder.

I've done this with quite good results, with the right amount of care in the final material removal stages, the 'wreckage' can tell you quite a lot. I've actually had serious discussions with chip makers, following this 'advanced reverse engineering' :)

-jg

Hi,

Although not entirely accurate, this paper can be a starting point:

Similarly, this paper gives you some idea what your sizes would be if you would go on and make your own FPGA:

-Doug

Hi Thank you all very much for pointer and comments

-P