Trying to build simple demo using XPS and XC2VP20

Hi there,

We have a Xilinx HW-AFX-FF1152-300 Proto Board, populated with a Virtex-II Pro XC2VP20. We're running XPS 6.1 and Project Navigator 6.1.

I was working through the tutorial PDF Xilinx have for EDK 6.1 using the PowerPC as a first project, and unfortunately the XPS Base System Builder Wizard does not support the board we have, but I attempted to genereate a design for the AFX-FG456, which was supported, and then alter it to suit.

My first attempt involved following the tutorial, with three changes:

1) After the wizard has finished I change the part specification to the XC2VP20 in XPS.

2) I manually modified the contents of the system.ucf file to contain the correct pin assignments for the package we had.

3) I altered the C file that comes with the tutorial to suit.

This would then successfully build, generating a netlist in XPS, exporting it to PN for synthesis, and importing in back and updating the bitstream with the compiled software. However, this design would fail to download when we tried it with iMPACT.

Our first guess as to why this is (and if someone can correct me/confim this I'd be most grateful) is because we'd not specified in XPS anything for the second processor. In the Xilinx XBERT demo, for the XC2VP20 you need to use system_2cpu.mhs when building that project, otherwise it won't download. The only apparent difference between the two mhs files with XBERT is that the 2cpu version specifies a wrapper for the second PPC, which is not connected to anything.

So, back to XPS, I added a second PPC wrapper and connected it up as done in the XBERT demo (I actually ended up just copy and pasting and adjusting slightly the second CPU wrapper from the XBERT demo into the system.mhs for my trial project). Using this I can generate a netlist in XPS, but when I now export it to PN and try to generate the design, it fails with the following error at the mapping stage:

Error:PACK:1195 ppc405_1/ppc405_1/PPC405_i has no output pin.

ppc405_1 is the wrapper for the second cpu (the first being ppc405_0).

I have no idea what this means. Can anyone point out to me the error of my ways here? Thus far I've not managed to complete the tutorial, so feel slightly foolish :)

Many thanks in advance,

--
Michael Dales
University of Cambridge Computer Laboratory
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Michael Dales
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dummy modules should have at least one output pin or they will be optimized away or produce error.

just add dummy output, and make sure the dummy signal is actually used i.e. make sure the load is not optimized away, just route a constant GND to some unused IO as example.

not sure if it helps in your case, but it helps to bypass the error "no output"

we are forced to use this technology sometimes when using chipscope cores, they have only inputs! (outputs are hidden as they go tho bscan primitive only)

Antti xilinx.openchip.org

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Antti Lukats

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