Compilation error

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YesMann Contact options for registered users 's Avatar (by Gravatar) posted on
August 8, 2003, 10:47 am
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Hello,
I have error in the process below;
My process is:

1. process(cycle)
2. begin
3.   case cycle is
4.
5.
6.      WHEN  "000000" | "000001" | "000010"     => REG <= "001000";
7.      WHEN  "000011" to "011101"                    => REG <= "000000";
8.      WHEN  "011110" | "011111" | "100000"     => REG <= "001010";
9.      WHEN  "100001"                                        => REG <=
"000010";
10.    WHEN  "100010" | "100011" | "100100"      => REG <= "001101";
11.    WHEN  "100101" to "101000"                     => REG <= "000101";
12.
13.      WHEN OTHERS    => REG     <="000000";
14.
15.   end case;
16. end process;

The  line 7 and 11 are considered as error : " Range must be a scalar type".
What can I specified the range  "000011" to "011101" in VHDL language ?

Thanks in advance



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Jonathan Bromley Contact options for registered users 's Avatar (by Gravatar) posted on
August 8, 2003, 11:19 am
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Re: Compilation error


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type".
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You can't.  However, you are using these values rather like numbers,
so it may be easier to convert them to integers for use in the case
statement:

  case to_integer(cycle) is
    ...
    when 3 to 29 => REG <= "000000";
    ...

Of course, the precise form of "to_integer" depends on what
numeric packages you are using, and the data type of "cycle".
If "cycle" is the output of a counter, and you have been
sensible and used ieee.numeric_std, and cycle is of type
UNSIGNED, then to_integer() is correct.



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YesMann Contact options for registered users 's Avatar (by Gravatar) posted on
August 8, 2003, 12:51 pm
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Re: Compilation error


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_______________________________

Thanks you for your response;
But if I process as your description, I have another message error:
"Type error in range expression";
What happened?

Thanks in advance





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