Error in converting code to VHDL

Hi, Can some one please help out.Thanks. I am trying to convert below code to VHDL using HDL Coder but getting error .Please can you have a look on it and see whats the mistake in block diagram.

x1=[1 2 3 4 5 6 7 8 9]; x2=[3 4 5 6 7 8 9 2 1]; n=length(x1); xc=zeros(2*n-1,1); for i=1:2*n-1 if(i>n) j1=1; k1=2*n-i; j2=i-n+1; k2=n; else j1=n-i+1; k1=n; j2=1; k2=i; end xc(i)=sum(conj(x1(j1:k1)).*x2(j2:k2)); end xc=flipud(xc);


Cannot connect to model 'prc4'; please try Update Diagram (Ctrl-D).

Error due to multiple causes.

Errors occurred during parsing of MATLAB function 'MATLAB Function'(#24)

Error in port widths or dimensions. Output port 1 of 'prc4/MATLAB Function/u' is a one dimensional vector with 1 elements.

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Jamil Hayder
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