Hello Guys, I am facing some problem in using chipscope. I am using chipscope core inserter has i synthesis my code using synplify. In my code i have any IP core which is provided to me in netlist form. One of my doubt is that when i am assigning signal to trigger signal i am not able to see the IP core module (netlist form). Why is this so? I am using chipscope 6.3i (evaluation). In the final waveform i am not able to view the triggering signal, signal other than triggering signal can be viewed. How i view trigger signal also. I am also not able to give label to signal which i am viewing, it appears as ch0....ch15...
Thanks and regards williams