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Barrel shifter synthesis in QuartusII

Hi,

I tried to compile the code presented some days ago in this newsgroup. I use Altera QuartusII v3.0 SP2

and got the following warning:

Warning: VHDL Subtype or Type Declaration warning at numeric_std.vhd(878): subtype or type has null range Switching left and right bound of range.

Was does that mean?

Apart from that I get the Info "No valid register-to-register paths exist for clock Clk"

What does go wrong with timing calculation?

Rgds

library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all;

entity barrelshifter is port( Quantity : in unsigned(31 downto 0); Amount : in unsigned(4 downto 0); Reset : in std_logic; Clk : in std_logic; Output : out std_logic_vector(31 downto 0) ); end barrelshifter;

architecture ro_lft of barrelshifter is signal rotated : std_logic_vector(31 downto 0); signal rotate_by : unsigned(4 downto 0);

begin rotate_by

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ALuPin
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Hi,

The first message should just say Warning: VHDL Subtype or Type Declaration warning at numeric_std.vhd(878): subtype or type has null range The remainder of the message is incorrect.

The reason that the message occurs is that numeric_std deliberately declares a constant with a null range to return as an error condition from some of its functions.

There appears to be only one set of registers in the design, so there are no register-to-register paths, only clock-to-input and clock-to-output (Tsu and Tco) paths.

- Subroto Datta Altera Corp.

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Subroto Datta

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