accesing JTAG ports on GPIOs

maverick schrieb:

sure, get it here:

Antti

Hi Antti, Thanks alot for the reply. I did have a look at the Spartan3-1000.vhd file. Unfortunately, I am a Verilog writer and do not have much exposure to VHDL code. What I have understood from the code is, I have to instantiate this primitive into my design and map the IO to FPGA IOs. It will make my life easy if you can demonstrate it by making required changes in the following simple counter code as it is not clear to me how would I make the chipscope logic communicate to this primitive. In the following code, assume that I have to monitor 8-bit counter reg in chipscope pro.

//---------------------------------------- module my_counter(clk, rst, led );

input clk; input rst; output led;

reg [7:0] counter;

always @(posedge clk) if(rst) counter

just use the VHDL in your verilog design should be no issue all modern synthesis tools support mixed language designs.

Antti

Thanks Antti for the reply, Yes, I am aware of the feature of mixed language synthesis. But here, I am more interested to know how to use these soft BSCAN primitives in the case where I need to use Chip SCope pro as well. Kindly modify the sample program I posted earlier to show the changes required to incorporate BSCAN primitive to use chip scope pro using GPIOs.

Thanks

Hi Antti, I am anxiously waiting for your guidance on my problem. Kindly, do reply....

Farhan

are

the

Dear maverick,

sure I can: "Kindly modify the sample program you posted posted earlier.." so if you wish that please contact me in private - the hourly fee is

if you just want other people to do your work, or things you dont want to learn then I guess you must wait, or seek another job

Antti

are

the

Hi Antti, I never meant it that way that you do my work. , I am sorry in case if I have made you feel like that. Anyways, thanks for your help.

signals are

me

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insert the

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have

ausblenden -

well read what you wrote your self. what you need can be done with a few mouseclicks. but if I do it for you never learn.

Antti

signals are

deprives me

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them to

insert the

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ports

Spartan3-1000.vhd

have

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Text ausblenden -

Sure, I will work on it, thanks

maverick wrote: ...

signals are

Could you please quote sensibly?

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