Dear all; Please tell me if I'm wrong. A typical design cycle for FPGA is to use the IEEE and Unisim libraries and their primitives (if you wish) and run the functional simulation with Modelsim and after that you go for some synthesis tool like LeonardoSpectrum or Precision RTL. Am I right?
ps. I know, that in case you don't want to sue the primitives as IPs in your design, the synthesis tool will extract them automatically if you restrict yourself to some kind of standard templates.
I know that I might be missing a lot. Give me directions please.
Thank you..
ps. in what way can I use SIMPRIM library?